When sending information data, it is often the practice to attach redundant data in accordance with specific encoding rules in order to detect and correct transmission errors which have occurred on the transmission channels, or to compress the information data according to specific encoding rules in order to compress the amount of data being sent. The combination of information data and redundant data is referred to as a "frame." Each frame unit is then decoded at the receiving end. In order that the receiving end be able to detect the frames, a method has been widely employed in which a unique word which indicates the frame position is attached inside the frame. While the position of this unique word in the frame is not particularly restricted, it is most frequently disposed at the head of the frame in order to simplify the circuit structure. Thus, by detection of the unique word, the receiving end is able to identify the frame position and decode the transmitted information data.
FIG. 11 shows a block diagram of a conventional frame synchronization circuit. Data series D received via input terminal 11 is supplied to input buffer 15 which is inside unique word detection circuit 12, and is stored therein. Input buffer 15 generates data which is the length of the unique word by shifting each bit of received data series D sequentially, and supplies each generated data as one input to comparator 16. Unique word generator 17 supplies the correct unique word as another input to comparator 16. Comparator 16 then compares the generated data and the correct unique word, and outputs a "1" when they match or a "0" when they do not match to synchronous determination circuit 13.
For example, when the received data series D shown in FIG. 12(A) is received, the output of comparator 16 becomes as shown in FIG. 12(B). Please note that this example assumes that a transmission error did not occur on the transmission channels, and that there was not a bit pattern in the information data which by chance matched the bit pattern of the unique word.
The operation of synchronous determination circuit 13 will now be explained with reference given to FIG. 13. FIG. 13 is a state transition diagram for a conventional synchronous determination circuit. The first state is asynchronous state S1 in which the frames are not synchronized. In this explanation, an output of "1" from comparator 16 will be defined as "detected," indicating that a bit pattern which matches the unique word was detected in received data series D, and an output of "0" will be defined as "not detected," indicating that a bit pattern which matches the unique word was not detected in received data series D. When a bit pattern matching the unique word is detected, the operating state of synchronous determination circuit 13 transitions to backward 1 state S2. When a bit pattern matching the unique word is not detected, then the operating state of the circuit remains in asynchronous state S1, and awaits the next output from comparator 16.
After transitioning to backward 1 state S2, synchronous determination circuit 13 skips through received data series D by the fixed frame length, waits for the output from comparator 16, and determines whether a bit pattern matching the unique word is "detected" or "not detected". In the same manner as above, when a matching bit pattern is "detected", the operating state of the synchronous determination circuit transitions to backward 2 state S3, and again determines whether a matching bit pattern is "detected" or "not detected". This determination is then repeated in the same manner for the states subsequent to backward 2 state S3, with the operating state of synchronous determination circuit 13 arriving at synchronized state S5 once bit patterns matching the unique word are continuously detected.
In contrast, when a bit pattern matching the unique word is not detected between backward 1 state S2 and backward N state S4, the operating state of synchronous determination circuit 13 immediately returns to asynchronous state S1. This range of states from backward 1 state S2 to backward N state S4 is referred to as "backward protection", and is created to avoid false synchronization. Namely, if there is a bit pattern in received data series D which by chance matches the unique word (but is not the unique word), then this bit pattern will be incorrectly identified as the unique word, resulting in an false detection. This type of false detection can be avoided, however, by repeating the matching determination between the bit pattern and the unique word N times.
Even in synchronized state S5, synchronous determination circuit 13 continues to skip through received data series D by the fixed frame length, and determines whether a bit pattern matching the unique word is "detected" or "not detected". When a bit pattern matching the unique word is detected, the operating state of synchronous determination circuit 13 remains in the synchronized state, while when a matching bit pattern is not detected, the operating state of synchronous determination circuit 13 transitions to forward 1 state S6.
After transitioning to forward 1 state S6, synchronous determination circuit 13 continues to skip through received data series D by the fixed frame length, waits for the output from comparator 16, and then determines whether a matching bit pattern is "detected" or "not detected". When a matching bit pattern is not detected, the operating state of synchronous determination circuit 13 transitions to forward 2 state S7, and again determines whether a matching bit pattern is "detected" or "not detected". This determination is then repeated in the same way for states subsequent to forward 2 state S7. The operating state of synchronous determination circuit 13 arrives at asynchronous state S1 once there is continuous non-detection of a bit pattern matching the unique word.
On the other hand, when a bit pattern matching the unique word is detected between forward 1 state S6 to forward M state S8, the operating state of synchronous determination circuit 13 immediately returns to synchronized state S5. The range of states from forward 1 state S6 to forward M state S8 is referred to as "forward protection", and is provided to avoid out of synchronization. In other words, even when the unique word is not detected due to a transmission error, it is possible to avoid out of synchronization because the matching determination is repeated M times.
Variable length frame encoding is sometimes employed to compress the amount of date when encoding moving images. In this case, the length of the frame can be changed, so that even when a unique word has been detected and the frame position identified, it is not possible to predict the position of the next unique word. For this reason, it is not possible to employ a method such as the fixed frame length method above. Rather, it is necessary to go through each bit of received data series D sequentially, for all the frames, repeating the matching determination until a bit pattern matching the unique word is detected. Accordingly, it is not possible to employ synchronization protection such as shown in FIG. 13. In this case, then, false detection of a unique word has the most serious results. Namely, if a bit pattern which matches the unique word by chance is present in received date series D, this will be determined to be the correct position of the frame. As a result, meaningless data is extracted and decoded.
As a method to avoid this, an operation known as "stuffing" may be carried out in advance to the data series. This method checks the data to be transmitted, and inserts a predetermined dummy bit to the portion of the data which matches the unique word, so that false detection of the unique word is avoided. This method is widely employed in international standards for image encoding such as MPEG and the like. For example, if the unique word is "11111111", then for the parts of the data to be transmitted in which "1" is continuous for more than or equal to 8 bits, a 0 is inserted in the eighth bit as a dummy bit. As a result, the minimum hamming distance between the unique word and the transmitted data series can be set to be above or equal to 1, thereby avoiding false detection.
Further, a method has also been proposed in which much stronger frame synchronization can be obtained by applying encoding rules to the information data inside the frame (refer to Utility Model Application: Sho 57-64815). In this error detection/correction device, a method is employed together with the above-described unique word detection method in which the number of encoding violations in the received data series D is monitored. If the violation number is below a fixed threshold value, then a determination is made that the current position is the correct position for frame synchronization.
A unique word was employed as the synchronization code in the case of both the fixed length frame and the variable length frame methods described above. As a result, when a transmission error occurred on the transmission channels, the unique word was not detected or was incorrectly detected, leading to out of synchronization or false synchronization. On the other hand, when an attempt is made to improve this situation by increasing the length of the unique word, redundancy results because it is necessary to increase the hamming distance between the unique word and received data series D.
Further, when there is a high probability of false or miss detection, the technique of increasing the number of steps in forward protection (S2.about.S4) and backward protection (S6.about.S8) shown in the state transition diagram of FIG. 13 has been employed to avoid out of synchronization or false synchronization. However, this approach is disadvantageous in that a long time is required to establish synchronization, or to recover once false synchronization has occurred.
Moreover, in the case of variable length frames, when the above-described stuffing is carried out, it becomes necessary to attach dummy data. Accordingly, redundancy must be provided to the data being transmitted merely in order to establish frame synchronization. Moreover, in order to avoid miss detection due to transmission errors, a method may be considered in which a fixed number of non-matching of bits is permitted during the matching determination. However, in this case, the number of dummy bits introduced has to be increased to maintain a larger hamming distance, therefore further increasing redundancy.
The method disclosed in Utility Model Application Sho 57-64815 may also be considered, in which all of the information data to be transmitted is encoded using the same encoding rules. However, this method cannot be applied when only a portion of the information data is encoded, such as in the case of PDC, the well known high capacity digital signal transmission method (see ARIB RCR STD-S7C Chapter 5 Voice Coding System CODEC). Alternatively, if this method is employed, it results in a significant degradation in the ability to synchronize the frames.
Namely, it is typically the case that the non-encoded portion of the information data is a random series. When detection of encoding violations is performed on this portion of the data, false detection occurs frequently, in the same way as occurred in the case of detecting a unique word, so that it becomes difficult to know the correct position for frame synchronization. In particular, when this method is employed to wireless transmission channels, where transmission errors frequently occur, false detection can result with even greater frequency unless the detection threshold described above for avoiding miss detection is set carefully.
When a transmission error is present, it is generally the case that the unique word is more reliable than a supplementary signal obtained by encoding rule violations. For this reason, when the position for frame synchronization obtained using the unique word is supplemented by the frame synchronization position obtained using encoding rule violations, there is a concern that the reliability of frame synchronization will be impaired. On the other hand, to avoid this problem, Utility Model Application Sho 57-64815 discloses a detection method which extends over a plurality of frames. However, in this case, the time required to establish frame synchronization becomes longer. Accordingly, this method is disadvantageous in that it requires a long time to establish initial frame synchronization, and to recover once out of frame synchronization has occurred.